In many signal processing applications there exists a need for providing exponential gain variations based on a linearly varying input control. Exponential gain variation implies that each increment in the control signal translates into a multiplication of the present gain value by a fixed quantity. Where this gain is controlled so as to vary based on a programmed input code or a control signal, the amplifier can be considered to a programmable gain amplifier.
One approach to providing exponential gain variation may take into account the exponential dependence of collector current on the base to emitter voltage of a bipolar junction transistor (BJT) device. That is, a BJT device may be used for gain control. One example of such an approach is shown in the publication, “Comlinear CLC520 Amplifier with Voltage Controlled Gain”, National Semiconductor Corporation (NSC) Data Sheet, August 1996.
FIG. 1A shows exponential gain characteristics, as illustrated in the above referenced NSC data sheet. The graph of FIG. 1A includes a graph 120 that shows a gain versus the input voltage, Vg. The gain may be the ratio between an amplifier output voltage and the input voltage Vg. FIG. 1B shows these same characteristics, but with the gain measured in decibels (dB), which equals 20 log(Vout/Vin). The Gain(dB) versus input voltage (Vg) curve is labeled 124.
While BJT gain control approaches, and the like, can provide exponential gain control, alternate approaches can provide a piecewise linear approximation to the exponential gain. Such approaches can include cascaded attenuators. An example of a conventional approximation approach is shown in “An Analog-to-Digital Processor for Camcorders and Digital Still Cameras”, IEEE Transactions on Consumer Electronics, Vol. 44, No. 3, Aug. 1998, by Mike Koen. In Koen, the relative gain versus a control voltage is as shown in FIG. 1C as curve 128. While Koen can provide an approximation of an exponential gain control, such an approach may be limited by noise requirements. It would be desirable to arrive at a more robust way of providing exponential gain control.
Still other approaches to approximating exponential linear gain control can include amplifier circuit that include switched capacitor networks. Accordingly, by way of further background, some basic principles of switched-capacitor networks will now be described. Typically, switched-capacitor networks can include metal-oxide-semiconductor (MOS) type switches. In MOS technology, it is relatively easy to implement switches, capacitors, and operational amplifiers (op amps). However, it can be difficult to construct resistors with the necessary accuracy. Consequently, switched-capacitor circuits can allow for a basic resistor approximation by using two MOS switches and a capacitor.
Extensive switched-capacitor networks, particularly those that employ the use of op amps and feedback circuitry, are well known in the art. Common applications include performing certain mathematical operations. For example, op amp circuits with switched-capacitor networks can implement signal summation, differentiation, programmable gain, and integration, to name only a few.
Programmable gain amplifiers can be implemented as a circuit using many different topologies, but with different degrees of relative success. For example, a programmable gain amplifier may have an open loop configuration, where there is no feedback network present. However, open loop topologies usually suffer from a compromise of signal range and linearity. As but one example, it is believed that achieving a signal gain which is linear to a 10-bit level for a one volt scale signal for any programmed gain, can be very difficult.
Closed loop, switched-capacitor programmable gain amplifiers, which include a feedback network present, are believed to provide better signal linearity than open loop approaches. Still further, in many cases switched-capacitor networks may be easily controlled by a digital interface. This can result in improved linearity of gain control (on a log scale) compared to other schemes.
Switched-capacitor circuits can handle large input signals that can be programmed over a wide range. However, the accuracy of a switched capacitor can often be dominated by capacitor matching. Thus, in many conventional approaches, in order to achieve exponential gains, exponentially varying capacitor sizes are used. Unfortunately, it can be difficult to design with exponentially varying capacitor sizes because of silicon area and power requirements.
A programmable gain amplifier that may include a switched-capacitor network of unit capacitors is shown in U.S. patent application Ser. No. 09/354,461, filed on Jul. 15, 1999 and titled “A Capacitor-Based Exponential Programmable Gain Amplifier” (referred to herein as Application Ser. No. 354,461).
In general, it can be possible to implement exponential gain variation with the approximation loge (1+x)/(1−x)=˜2x, where |x|<1 is utilized. Here, x varies linearly and can correspond to the input gain setting code. A switched-capacitor stage of a programmable gain amplifier can implement a gain according relationship (a+x)/(a−x), which can be seen to vary exponentially with x. Thus, for a switched-capacitor gain stage, the gain can be determined as the ratio of the number of unit capacitors used to sample an input to the number used for feedback. In the particular equation described above, a sampling capacitance can be represented by a gain numerator term (a+x), while a feedback capacitance can be represented by a gain denominator term (a−x). Accordingly, the number of unit capacitors used for sampling corresponds to (a+x) and those used for feedback correspond to (a−x).
In an approach such as Application Ser. No. 354,461, a sampling capacitance can be conceptualized as including (a−x) and 2x capacitors, totalling (a+x) capacitors. As is understood the feedback capacitance (a−x) is included in the sampling capacitance term. Such a splitting of terms can enable implementation of the programmable gain amplifier with a reduced number of unit capacitors. One such implementation is shown schematically in FIG. 2A. It is understood that during the operation of a circuit, switching may result in the use of some unit capacitors and the non-use of others. Unused capacitors in any gain setting can be left connected to an op amp input node, and thereby serve to reduce the variation in the feedback-factor of the closed loop amplifier.
Referring again to FIG. 2A, a schematic diagram of a programmable gain amplifier according to the prior art will be described in more detail. The conventional programmable gain amplifier circuit is designated by the general reference character 200 and is shown to include an operational amplifier (op amp) 202, capacitive switching circuits (204 and 206), switches (208 and 210), feedback switch 212, switch 214, and a sample precharge switch 216.
The op amp 202 has a noninverting input connected to a charge summing node 218. The op amp 202 has an inverting input connected to node 230. The inverting output of the op amp 202 is connected to an analog output terminal 220, which is also labeled as Vout+, while the non-inverting output of the op amp 202 is connected to an analog output terminal 232. Analog output node 220 is connected to the closed position input terminal of feedback switch 212.
The programmable gain amplifier receives an input signal Vin+ at analog input terminal 226. The analog input terminal 226 is connected to the closed position input terminals sample switches 208 and 210. A ground terminal 228 is connected to the closed position input terminal of switch 214. The output terminals of feedback switch 212 and sample switch 208 are connected to the input terminal of the capacitive switching circuit 204. The capacitive switching circuit 204 is a capacitor that has the value a−x. The output terminals of sample switch 210 and switch 214 are connected to the input terminal of capacitive switching circuit 206, the capacitive switching circuit 206 is a capacitor that has the value 2x. Terminals of the capacitive switching circuits 204 and 206 are connected to the charge summing node 218, which is also connected to the noninverting input of op amp 202 and to the output terminal of sample precharge switch 216.
A reference signal Vref is connected to the closed position input terminal of sample precharge switch 216. As is common in the art, only one half of the symmetric fully differential circuit is shown here for simplicity.
FIG. 2B shows the two phase non-overlapping clocking scheme that controls the switches in the circuit of FIG. 2A, as well as in the circuits to be discussed below. In FIG. 3A, the Sample waveform 270 rises coincident with Sample-P waveform 272, but Sample waveform 270 remains high longer than Sample-P waveform 272. Feedback waveform 274 is high only during the time period when both Sample waveform 270 and Sample-P waveform 272 are low.
Referring again to FIG. 2A in conjunction with FIG. 2B, the Feedback signal is coupled to feedback switch 212 and switch 214. When Feedback is high, feedback switch 212 and switch 214 connect their respective closed position input terminals to their respective output terminals. When Feedback is low, feedback switch 212 and switch 214 connect their respective open position input terminals to their respective output terminals. The Sample signal is coupled to sample switches 208 and 210. When Sample is high, sample switches 208 and 210 connect their respective closed position input terminals to their respective output terminals. When Sample is low, sample switches 208 and 210 connect their respective open position input terminals to their respective output terminals. The Sample-P signal is coupled to sample precharge switch 216. When Sample-P is high, the closed position input terminal is connected to the sample precharge switch 216 output terminal. When Sample-P is low, sample precharge switch 216 is configured in the open position, thus the open position input terminal of sample precharge switch 216 is connected to the sample precharge switch 216 output terminal.
By viewing FIG. 2A in conjunction with FIG. 2B, the circuit operation can be ascertained. When Sample and Sample-P are both high, during Phase 1, sample precharge switch 216 and sample switches (208 and 210) are all in their closed positions. Because feedback is low at this time, feedback switch 212 and switch 214 are in their open positions. As such, the input nodes of the capacitive switching circuits 204 and 206 are both charged to Vin+while the charge summing node 218 is charged to Vref. Such a charging occurs over parallel sampling capacitances a−x and 2x, for a total sampling capacitance of a+x. This capacitance can correspond to a numerator term of a programmable gain.
When Feedback is high, during Phase 2, feedback switch 212 and switch 214 are in their closed positions, while all other switches are in their open positions. This is the state of all switches as actually illustrated in FIG. 2A. During Phase 2, the Vout+ level is connected through feedback switch 212 and to the input node of the capacitive switching circuit 204. Also during Phase 2, the input node of the capacitive switching circuit 206 is connected to ground terminal 228 through switch 214. A feedback voltage may thus be applied to non-inverting input by way of feedback capacitance a−x. This capacitance can correspond to a denominator term of a programmable gain. The total number of capacitors required is the sum of “a” and the maximum number of steps (xmax). For a particular gain setting “x1”, there exist (a+Xmax)−(a+x1)=(Xmax−x1) capacitors that can be unused for the gain operation. These can be unused in both the sample and feeback phase and can be left connected to node 218 in both phases for the purpose of stabilization.
In review, during the Phase 1 sampling period, capacitive switching circuits 204 and 206 are connected to the input signal Vin+through sample switches 208 and 210, respectively. The sum of their capacitance values, or a−x+2x=a+x, gives the numerator in the overall gain equation. During the Phase 2 feedback period, only capacitive switching circuit 204 is enabled to the actual feedback signal, Vout+, through feedback switch 212. As such, the denominator in the overall gain equation is given by the capacitance value of the capacitive switching circuit 204 (a−x). Thus, the overall gain equals (a+x)/(a−x). It is understood that x is a programmable value that may be applied to the programmable gain amplifier.
In this way, one conventional approach can arrive programmable gain stage with an exponential gain control by switching to a predetermined sample capacitance and then to a predetermined feedback capacitance for all programmed gain steps.
The topology considered above can include capacitor arrays that include only unit capacitors. It follows that as the number of possible gain steps (determined by value x) increases, the number of unit capacitors can increase correspondingly. However, while unit capacitors may provide for increased accuracy in arriving at sampling and feedback capacitance, such unit capacitors can require valuable area on an integrated circuit device. Further, a larger number of capacitors can translate into more stores charge, and hence greater power consumption. Thus, larger numbers of unit capacitors can work against the common goal of smaller, lower power devices.
One approach to providing a programmable amplifier with gain steps that may require fewer capacitors can be to include an array of switchable weighted capacitors. Weighted capacitors may be weighted in a binary, exponential, or some other fashion. In such an approach, weighted capacitors may be switched to arrive at a desired sample and feedback capacitance. However, as noted above, gain accuracy can be reduced due to the difficulty in matching between the capacitors of different sizes.
In light of the above discussion, it would be desirable to arrive at some way of providing a programmable gain amplifier that may include a given number of gain steps, but include fewer capacitors than conventional approaches.
It would also be desirable to arrive at some way of providing a programmable gain amplifier that may approximate and an ideal exponential response over a wider range of gain values than conventional approaches.